MX25L6445EM2 データシートの表示（PDF） - Macronix International

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MX25L6445EM2

64M-BIT [x 1/x 2/x 4] CMOS MXSMIO™ (SERIAL MULTI I/O) FLASH MEMORY

Macronix International 

MX25L6445E

Figure 25. Sector Erase (SE) Sequence (Command 20)................................................................................. 56

Figure 26. Block Erase (BE/BE32K) Sequence (Command D8/52)................................................................ 56

Figure 27. Chip Erase (CE) Sequence (Command 60 or C7).......................................................................... 56

Figure 28. Page Program (PP) Sequence (Command 02).............................................................................. 57

Figure 29. 4 x I/O Page Program (4PP) Sequence (Command 38)................................................................. 57

Figure 30. Continously Program (CP) Mode Sequence with Hardware Detection (Command AD).................. 58

Figure 31. Deep Power-down (DP) Sequence (Command B9)....................................................................... 58

Figure 32. Release from Deep Power-down and Read Electronic Signature (RES) Sequence (Command AB).

.......................................................................................................................................................................... 59

Figure 33. Release from Deep Power-down (RDP) Sequence (Command AB).............................................. 59

Figure 34. Read Electronic Manufacturer & Device ID (REMS) Sequence (Command 90 or EF or DF or CF)..

.......................................................................................................................................................................... 60

Figure 35. Write Protection Selection (WPSEL) Sequence (Command 68).................................................... 60

Figure 36. Single Block Lock/Unlock Protection (SBLK/SBULK) Sequence (Command 36/39)..................... 61

Figure 37. Read Block Protection Lock Status (RDBLOCK) Sequence (Command 3C)................................. 61

Figure 38. Gang Block Lock/Unlock (GBLK/GBULK) Sequence (Command 7E/98)....................................... 61

Figure 39. Power-up Timing.............................................................................................................................. 62

Table 12. Power-Up Timing .............................................................................................................................. 62

INITIAL DELIVERY STATE............................................................................................................................... 62

OPERATING CONDITIONS....................................................................................................................................... 63

Figure 40. AC Timing at Device Power-Up....................................................................................................... 63

Figure 41. Power-Down Sequence................................................................................................................... 64

ERASE AND PROGRAMMING PERFORMANCE..................................................................................................... 65

DATA RETENTION..................................................................................................................................................... 65

LATCH-UP CHARACTERISTICS............................................................................................................................... 65

ORDERING INFORMATION....................................................................................................................................... 66

PART NAME DESCRIPTION..................................................................................................................................... 67

PACKAGE INFORMATION........................................................................................................................................ 68

REVISION HISTORY ................................................................................................................................................. 71

P/N: PM1736

REV. 1.8, DEC. 26, 2011

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