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FDD6630A データシートの表示(PDF) - Fairchild Semiconductor

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FDD6630A
Fairchild
Fairchild Semiconductor Fairchild
FDD6630A Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Drain-Source Avalanche Ratings (Note 2)
WDSS
Drain-Source Avalanche Energy Single Pulse, VDD = 15 V
IAR
Drain-Source Avalanche Current
Off Characteristics
BV DSS
BV DSS
TJ
IDSS
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
IGSSF
Gate–Body Leakage, Forward
IGSSR
Gate–Body Leakage, Reverse
VGS = 0 V, ID = 250 µA
ID = 250 µA, Referenced to 25°C
VDS = 24 V,
VGS = 20 V,
VGS = –20 V,
VGS = 0 V
VDS = 0 V
VDS = 0 V
On Characteristics (Note 2)
V GS(th)
Gate Threshold Voltage
V GS(th)
TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID(on)
On–State Drain Current
gFS
Forward Transconductance
VDS = VGS, ID = 250 µA
ID = 250 µA, Referenced to 25°C
VGS = 10 V, ID = 7.6 A
VGS = 4.5 V, ID = 6.3 A
VGS = 10 V, ID = 7.6 A, TJ = 125°C
VGS = 10 V,
VDS = 5 V
VDS = 5 V,
ID = 7.6 A
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
VDS = 15 V,
f = 1.0 MHz
V GS = 0 V,
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
(Note 2)
VDD = 15 V,
VGS = 10 V,
ID = 1 A,
RGEN = 6
td(off)
Turn–Off Delay Time
tf
Turn–Off Fall Time
Qg
Total Gate Charge
Qgs
Gate–Source Charge
VDS = 15 V,
VGS = 5 V
ID = 7.6 A,
Qgd
Gate–Drain Charge
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
VSD
Drain–Source Diode Forward
VGS = 0 V, IS = 2.7 A (Note 2)
Voltage
Min
30
1
20
Typ
23
1.7
–4
28
40
44
13
462
113
40
5
8
17
13
5
2
1.4
0.8
Max Units
55
mJ
7.6
A
V
mV/°C
1
µA
100 nA
–100 nA
3
V
mV/°C
35 m
50
58
A
S
pF
pF
pF
11
ns
17
ns
28
ns
24
ns
7
nC
nC
nC
2.7
A
1.2
V
Notes:
1. RθJAis the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCAis determined by the user's board design.
a) RθJA= 40°C/W when mounted on a
1in2 pad of 2 oz copper
b) RθJA= 96°C/W when mounted
on a minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3. Maximum current is calculated as:
PD
RDS( ON )
where PD is maximum power dissipation at TC = 25°C and RDS(on) is at TJ(max) and VGS = 10V. Package current limitation is 21A
FDD6630A Rev. 1.6

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