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ADT7467 データシートの表示(PDF) - ON Semiconductor

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ADT7467 Datasheet PDF : 72 Pages
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ADT7467
In the ADT7467, write operations contain either one or
two bytes, and read operations contain one byte. To write
data to a device data register or read data from it, the address
pointer register must first be set. The first byte of a write
operation always contains an address, which is stored in the
address pointer register, and the second byte, if there is a
second byte, is written to the register selected by the address
pointer register.
This write operation is illustrated in Figure 15. The device
address is sent over the bus, and then R/W is set to 0. This
is followed by two data bytes. The first data byte is the
address of the internal data register, and the second data byte
is the data written to that internal data register.
When reading data from a register, there are two
possibilities:
1. If the address pointer register value of the
ADT7467 is unknown or not the desired value, it
must be set to the correct value before data can be
read from the desired data register. This is
achieved by writing a data byte containing the
register address to the ADT7467. This is shown in
Figure 16. A read operation is then performed
1
9
SCL
consisting of the serial bus address and the R/W
bit set to 1, followed by the data byte read from
the data register. This is shown in Figure 17.
2. If the address pointer register is known to be at the
desired address, data can be read from the
corresponding data register without first writing to
the address pointer register, as shown in Figure 17.
If the address pointer register is already at the correct
value, it is possible to read a data byte from the data register
without first writing to the address pointer register.
However, it is not possible to write data to a register without
writing to the address pointer register, because the first data
byte of a write is always written to the address pointer
register.
In addition to supporting the send byte and receive byte
protocols, the ADT7467 also supports the read byte
protocol. (See the Intel System Management Bus
Specifications Rev. 2 for more information.)
If several read or write operations must be performed in
succession, the master can send a repeat start condition
instead of a stop condition to begin a new operation.
1
9
SDA
0
START BY
MASTER
10 11 1 0
FRAME 1
SERIAL BUS ADDRESS BYTE
R/W
D7
ACK. BY
ADT7467
D6 D5 D4 D3 D2 D1 D0
ACK. BY
FRAME 2
ADT7467
ADDRESS POINTER REGISTER BYTE
1
9
SCL (CONTINUED)
SDA (CONTINUED)
D7 D6 D5 D4 D3 D2 D1 D0
FRAME 3
DATA BYTE
ACK. BY STOP BY
ADT7467 MASTER
Figure 15. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
1
91
9
SCL
SDA
0
START BY
MASTER
1 01110
FRAME 1
SERIAL BUS ADDRESS BYTE
R/W
D7
ACK. BY
ADT7467
D6 D5 D4 D3 D2 D1 D0
ACK. BY
FRAME 2
ADT7467
ADDRESS POINTER REGISTER BYTE
STOP BY
MASTER
Figure 16. Writing to the Address Pointer Register Only
1
91
9
SCL
SDA
0
START BY
MASTER
10 11 10
FRAME 1
SERIAL BUS ADDRESS BYTE
R/W
D7
ACK. BY
ADT7467
D6 D5 D4 D3 D2 D1 D0
NO ACK. BY
FRAME 2
MASTER
DATA BYTE FROM ADT7467
STOP BY
MASTER
Figure 17. Reading Data from a Previously Selected Register
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