XC2285 データシートの表示（PDF） - Infineon Technologies

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XC2285

16/32-Bit Single-Chip Microcontroller with 32-Bit Performance

Infineon Technologies 

XC2287 / XC2286 / XC2285

XC2000 Family Derivatives

Preliminary

Electrical Parameters

4.4.5 External Bus Timing

The following parameters define the behavior of the XC228x’s bus interface.

Table 20 CLKOUT Reference Signal

Parameter

Symbol

Limits

Unit

Min.

Max.

CLKOUT cycle time

tc5 CC

40/25/151)

ns

CLKOUT high time

tc6 CC 3

–

ns

CLKOUT low time

tc7 CC 3

–

ns

CLKOUT rise time

tc8 CC –

3

ns

CLKOUT fall time

tc9 CC –

3

ns

1) The CLKOUT cycle time is influenced by the PLL jitter (given values apply to fCPU = 25/40/66 MHz).

For longer periods the relative deviation decreases (see PLL deviation formula).

CLKOUT

tC5

tC6

tC7

t C9

tC8

MCT05571

Figure 19 CLKOUT Signal Timing

Note: The term CLKOUT refers to the reference clock output signal which is generated

by selecting fSYS as source signal for the clock output signal EXTCLK on pin P2.8

and by enabling the high-speed clock driver on this pin.

Data Sheet

93

V0.91, 2007-02

Draft Version

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