100310 データシートの表示（PDF） - Fairchild Semiconductor
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100310 Datasheet PDF : 6 Pages
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Commercial Version (Continued)
AC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND
Symbol
Parameter
TC = 0°C
Min Typ Max
TC = +25°C
Min Typ Max
TC = +85°C
Min Typ Max
Units
Conditions
fMAX
tPLH
tPHL
Max Toggle Frequency
CLKIN A/B to Qn 750
750
750
MHz
SEL to Qn 575
575
575
MHz
Propagation Delay,
CLKINn to CLKn
Differential 0.80 0.90 1.00 0.82 0.92 1.02 0.89 1.01 1.09
ns Figure 3
Single-Ended 0.80 0.96 1.20 0.82 0.98 1.22 0.89 1.06 1.29
tPLH
Propagation Delay,
tPHL
SEL to Output
0.75 0.99 1.20 0.80 1.02 1.25 0.85 1.10 1.35 ns Figure 2
tPS
LH-HL Skew
10
30
10
30
10
30
(Note 4)(Note 7)
tOSLH
tOSHL
Gate-Gate Skew LH
Gate-Gate Skew HL
20
30
20
50
20
50
20
50
20
50
(Note 5)(Note 7)
ps
20
50
(Note 5)(Note 7)
tOST
Gate-Gate LH-HL Skew
30
60
30
60
30
60
(Note 6)(Note 7)
tS
Setup Time
300
300
300
ps
SEL to CLKINn
tH
Setup Time
0
0
0
ps
SEL to CLKINn
tTLH
Transition Time
275 510 750 275 500 750 275 480 750
ps Figure 4
tTHL
20% to 80%, 80% to 20%
Note 4: tPS describes opposite edge skews, i.e. the difference between the delay of a differential output signal pair’s LOW-to-HIGH and HIGH-to-LOW prop-
agation delays. With differential signal pairs, a LOW-to-HIGH or HIGH-to-LOW transition is defined as the transition of the true output or input pin.
Note 5: tOSLH describes in-phase gate-to-gate differential propagation skews with all differential outputs going LOW-to-HIGH; tOSHL describes the same con-
ditions except with the outputs going HIGH-to-LOW.
Note 6: tOST describes the maximum worst case difference in any of the tPS, tOSLH or tOST delay paths combined.
Note 7: The skew specifications pertain to differential I/O paths.
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