BUK109-50DL データシートの表示（PDF） - Philips Electronics
部品番号
コンポーネント説明
メーカー
BUK109-50DL Datasheet PDF : 10 Pages
| |||
Philips Semiconductors
PowerMOS transistor
Logic level TOPFET
Product specification
BUK109-50DL
120 PD%
Normalised Power Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Tmb / C
Fig.2. Normalised power dissipation.
PD% = 100⋅PD/PD(25 ˚C) = f(Tmb)
ID%
120
Normalised Current Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Tmb / C
Fig.3. Normalised continuous drain current.
ID% = 100⋅ID/ID(25 ˚C) = f(Tmb); conditions: VIS = 5 V
ID & IDM / A
1000
BUK109-50DL
Overload protection characteristics not shown
100
RDS(ON) = VDS/ID
tp =
100 us
10
DC
1 ms
10 ms
100 ms
1
1
10
100
VDS / V
Fig.4. Safe operating area. Tmb = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter tp
Zth / (K/W)
10
BUK109-50DL
D=
1
0.5
0.2
0.1
0.1 0.05
0.02
PD
tp
D=
tp
T
0
0.01
1E-07
1E-05
1E-03
t/s
T
t
1E-01
1E+01
Fig.5. Transient thermal impedance.
Zth j-mb = f(t); parameter D = tp/T
ID / A
50
40
30
20
10
VIS / V =
BUK109-50DL
6
5.5
5
4.5
4
3.5
3
0
0
Fig.6.
1
2
3
4
5
VDS / V
Typical on-state characteristics, Tj = 25 ˚C.
ID = f(VDS); parameter VIS; tp = 2 ms
RDS / mOhm
120
VIS / V =
100
3.5
80
BUK109-50DL
4.5
4
5
5.5
6
60
40
20
0
0
20
40
ID / A
Fig.7. Typical on-state resistance, Tj = 25 ˚C.
RDS(ON) = f(ID); parameter VIS; tp = 2 ms
June 1996
5
Rev 1.000
Share Link: 