BUK109-50DL データシートの表示（PDF） - Philips Electronics
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BUK109-50DL Datasheet PDF : 10 Pages
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Philips Semiconductors
PowerMOS transistor
Logic level TOPFET
Product specification
BUK109-50DL
a
1.5
Normalised RDS(ON) = f(Tj)
1.0
0.5
0
-60 -40 -20 0 20 40 60 80 100 120 140
Tj / C
Fig.8. Normalised drain-source on-state resistance.
a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 13 A; VIS = 5 V
td sc / ms
100
BUK109-50DL
Energy & Time
1
BUK109-50DL
Time / ms
0.5
Energy / J
Tj(TO)
0
-60
-20
20
60 100 140 180 220
Tmb / C
Fig.11. Typical overload protection characteristics.
Conditions: VDD = 13 V; VIS = 5 V; SC load = 30 mΩ
ID / A
30
BUK109-50DL
10
20
typ.
PDSM
1
10
0.1
0.1
1
10
PDS / kW
Fig.9. Typical overload protection characteristics.
td sc = f(PDS); conditions: VIS ≥ 4 V; Tj = 25 ˚C.
PDSM%
120
100
80
60
40
20
0
-60 -40 -20 0 20 40 60 80 100 120 140
Tmb / C
Fig.10. Normalised limiting overload dissipation.
PDSM% =100⋅PDSM/PDSM(25 ˚C) = f(Tmb)
0
50
60
70
VIS / V
Fig.12. Typical clamping characteristics, 25 ˚C.
ID = f(VDS); conditions: VIS = 0 V; tp ≤ 50 µs
VIS(TO) / V
2
1
max.
typ.
min.
0
-60 -40 -20 0
20 40 60 80 100 120 140
Tj / C
Fig.13. Input threshold voltage.
VIS(TO) = f(Tj); conditions: ID = 1 mA; VDS = 5 V
June 1996
6
Rev 1.000
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