BUK106-50S データシートの表示（PDF） - Philips Electronics

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BUK106-50S

PowerMOS transistor Logic level TOPFET

Philips Electronics 

Philips Semiconductors

PowerMOS transistor

Logic level TOPFET

VIS, VDS / V

15

VIS

10

BUK106-50L/S

VDS

5

0

0

1

2

Time / us

Fig.28. Typical resistive load switching waveforms

RI = RIS = 50 Ω; RL = 10 Ω; VDD = 15 V; Tj = 25 ˚C

VII

RI

RIS

D

TOPFET

P

VIS

F

P

I

S

Fig.29. External input resistances RI and RIS,

generator voltage VII and input voltage VIS.

Capacitance / pF

10,000

BUK106-50L/S

Product specification

BUK106-50L/S

BUK106-50LP/SP

Idsr

1 mA

100 uA

10 uA

typ.

1 uA

100 nA

0

20

40

60

80 100 120 140

Tj / C

Fig.31. Typical off-state leakage current.

IDSR = f(Tj); Conditions: VDS = 40 V; RIS = 100 Ω.

Ips normalised to 25 C

1.5

1

0.5

-60

-20

20

60

100

140

180

Tj / C

Fig.32. Normalised protection supply current.

IPS/IPS25 ˚C = f(Tj); VPS = VPSN

1000

Ciss

Coss

Crss

100

0

10

20

30

40

50

VDS / V

Fig.30. Typical capacitances, Ciss, Coss, Crss.

C = f(VDS); conditions: VIS = 0 V; f = 1 MHz

February 1993

11

Rev 1.200

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