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74LVC374A データシートの表示(PDF) - NXP Semiconductors.

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74LVC374A Datasheet PDF : 19 Pages
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NXP Semiconductors
74LVC374A
Octal D-type flip-flop; 5 V tolerant inputs/outputs; positive-edge trigger; 3-state
11. Waveforms
VI
CP input
GND
VOH
Qn output
VOL
1/fmax
VM
tW
t PHL
VM
t PLH
mna894
Fig 7.
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Clock (CP) to output (Qn) propagation delays, the clock pulse width, output transition times, and the
maximum frequency
VI
OE input
GND
VCC
output
LOW-to-OFF
OFF-to-LOW
VOL
VOH
output
HIGH-to-OFF
OFF-to-HIGH
GND
VM
tPLZ
tPZL
tPHZ
VX
VY
VM
tPZH
VM
outputs
enabled
outputs
disabled
outputs
enabled
mna644
Fig 8.
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
3-state enable and disable times
74LVC374A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 6 December 2012
© NXP B.V. 2012. All rights reserved.
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