PHD71NQ03LT データシートの表示（PDF） - NXP Semiconductors.

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PHD71NQ03LT

N-channel TrenchMOS logic level FET

NXP Semiconductors. 

NXP Semiconductors

PHD71NQ03LT

N-channel TrenchMOS logic level FET

5. Thermal characteristics

Table 5.

Symbol

Rth(j-mb)

Rth(j-a)

Thermal characteristics

Parameter

thermal resistance from junction to

mounting base

thermal resistance from junction to

ambient

Conditions

see Figure 4

mounted on a printed-circuit

board; minimum footprint

Min Typ Max Unit

-

-

1.25 K/W

-

75

-

K/W

03ai75

10

Zth(j-mb)

(K/W)

1

δ = 0.5

0.2

0.1

10-1

0.05

P

δ = tp

T

0.02

10-2

10−5

single pulse

10−4

10−3

tp

T

10−2

tp (s)

t

10−1

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration

PHD71NQ03LT_2

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 02 — 9 March 2010

© NXP B.V. 2010. All rights reserved.

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