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NCP623DM-3.3R2 データシートの表示(PDF) - ON Semiconductor

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NCP623DM-3.3R2 Datasheet PDF : 14 Pages
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NCP623
1 ms
NCP623 Without
Wake−up Improvement
(Typical Response)
30 ms
NCP623 With
Wake−up Improvement
(Typical Response)
Figure 6. NCP623 Wake−up Improvement with Small PNP Transistor
The PNP being wired upon the bypass pin, it shall not
degrade the noise response of the NCP623. Figure 7
confirms the good behavior of the integrated circuit in this
area which reaches a typical noise level of 26 mVRMS
(100 Hz to 100 kHz) at Iout = 60 mA.
350
300
250
200
Cbyp = 10 nF
150
Vin = 3.8 V
Vout = 2.8 V
Co = 1.0 mF
Iout = 60 mA
Tamb = 25°C
100
50 Output Noise = 26 mVrms C =
10 nF @ 100 Hz − 100 kHz
0
100
1,000
10,000
100,000 1,000,000
Frequency (Hz)
Figure 7. Noise Density of the NCP623 with a 10 nF
Bypass Capacitor and a Wake−up Improvement Network
http://onsemi.com
7

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