DS2430AP_99 データシートの表示（PDF） - Dallas Semiconductor -> Maxim Integrated
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DS2430AP_99 Datasheet PDF : 16 Pages
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DS2430A
1-WIRE BUS SYSTEM
The 1-Wire bus is a system which has a single bus master and one or more slaves. In all instances, the
DS2430A is a slave device. The bus master is typically a microcontroller. The discussion of this bus
system is broken down into three topics: hardware configuration, transaction sequence, and 1-Wire
signaling (signal type and timing). A 1-Wire protocol defines bus transactions in terms of the bus state
during specified time slots that are initiated on the falling edge of sync pulses from the bus master. For a
more detailed protocol description, refer to Chapter 4 of the Book of DS19xx iButton Standards.
Hardware Configuration
The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to
drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have open
drain connection or 3-state outputs. The 1-Wire port of the DS2430A is open drain with an internal circuit
equivalent to that shown in Figure 7. A multidrop bus consists of a 1-Wire bus with multiple slaves
attached. The 1-Wire bus has a maximum data rate of 16.3k bits per second and requires a pullup resistor
of approximately 5 kΩ .
The idle state for the 1-Wire bus is high. If for any reason a transaction needs to be suspended, the bus
MUST be left in the idle state if the transaction is to resume. If this does not occur and the bus is left low
for more than 120 µs, one or more of the devices on the bus may be reset.
HARDWARE CONFIGURATION Figure 7
*5 kΩ is adequate for reading the DS2430A. To write to a single device, a 2.2 kΩ resistor and VPUP of at
least 4.0V is sufficient. For writing multiple DS2430As simultaneously or operation at low VPUP, the
resistor should be bypassed by a low-impedance pullup to VPUP while the device copies the scratchpad to
EEPROM.
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