WME128K8 データシートの表示（PDF） - Microsemi Corporation
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WME128K8 Datasheet PDF : 12 Pages
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WME128K8-XXX
FIGURE 9 –
SOFTWARE BLOCK DATA PROTECTION DISABLE
ALGORITHM(1)
LOAD DATA AA
TO
ADDRESS 5555
LOAD DATA 55
TO
ADDRESS 2AAA
LOAD DATA 80
TO
ADDRESS 5555
LOAD DATA AA
TO
ADDRESS 5555
LOAD DATA 55
TO
ADDRESS 2AAA
LOAD DATA 20
TO
ADDRESS 5555
LOAD DATA XX
TO
ANY ADDRESS(4)
EXIT DATA
PROTECT STATE(3)
LOAD LAST BYTE
TO
LAST ADDRESS
NOTES:
1. Data Format: I/O7 - I/O0 (Hex); Address Format: A16 - A0 (Hex).
2. Write Protect state will be activated at end of write even if no other data is loaded.
3. Write Protect state will be deactivated at end of write period even if no other data
is loaded.
4. 1 to 128 bytes of data may be loaded.
SOFTWARE DATA PROTECTION
A software write protection feature may be enabled or disabled
by the user. When shipped by White Microelectronics, the
WME128K8-XXX has the feature disabled. Write access to the
device is unrestricted.
To enable software write protection, the user writes three access
code bytes to three special internal locations. Once write protection
has been enabled, each write to the EEPROM must use the same
three byte write sequence to permit writing. After setting software
Data protection, any attempt to write to the device without the
three-byte command sequence will start the internal write timers.
No Data will be written to the device; however, for the duration of
tWC. The write protection feature can be disabled by a six byte write
sequence of specific data to specific locations. Power transitions
will not reset the software write protection.
The software write protection guards against inadvertent writes
during power transitions or unauthorized modification using a
PROM programmer.
HARDWARE DATA PROTECTION
These features protect against inadvertent writes to the
WME128K8-XXX. These are included to improve reliability during
normal operation:
a) VCC power on delay
As VCC climbs past 3.8V typical the device will wait 5msec
typical before allowing write cycles.
b) VCC sense
While below 3.8V typical write cycles are inhibited.
c) Write inhibiting
Holding OE# low and either CS# or WE# high inhibits write
cycles.
d) Noise filter
Pulses of <15ns (typ) on WE# or CS# will not initiate a write
cycle.
Microsemi Corporation reserves the right to change products or specifications without notice.
July 2011 © 2011 Microsemi Corporation. All rights reserved.
9
Rev. 7
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
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