LP3982-18J5F データシートの表示（PDF） - Lowpower Semiconductor inc

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LP3982-18J5F

300mA,Ultra-low noise, Small Package Ultra-Fast CMOS LDO Regulator

Lowpower Semiconductor inc 

Preliminary Datasheet

The power dissipation definition in device is :

PD = (VIN−VOUT) x IOUT + VIN x IQ

The maximum power dissipation depends on the thermal

resistance of IC package, PCB layout, the rate of

surroundings airflow and temperature difference between

junction to ambient.

The maximum power dissipation can be calculated by

following formula :

PD(MAX) = ( TJ(MAX) − TA ) /θJA

Where TJ(MAX) is the maximum operation junction

temperature 125°C, TA is the ambient temperature and

the θJA is the junction to ambient thermal resistance. For

recommended operating conditions specification of

LP3982, where TJ(MAX) is the maximum junction

temperature of the die (125°C) and TA is the maximum

ambient temperature. The junction to ambient thermal

resistance (θJA is layout dependent) for SC-70-5

package is 250°C/W.

PD(MAX) = (125°C−25°C) / 250 = 400mW (SC-70-5)

PD(MAX) = (125°C−25°C) / 165 = 606mW

The maximum power dissipation depends on operating

ambient temperature for fixed TJ(MAX) and thermal

resistance θJA.

LP3982

LP3982 – Ver. 1.0 Datasheet Dec.-2006

Page 7 of 8

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