73S8010R-IM/F データシートの表示（PDF） - Teridian Semiconductor Corporation

部品番号

コンポーネント説明

メーカー

73S8010R-IM/F

Low Cost Smart Card Interface

Teridian Semiconductor Corporation 

73S8010R

Low Cost Smart Card Interface

DATA SHEET

DEACTIVATION SEQUENCE

Deactivation is initiated either by the system controller by resetting the Start/Stop bit, or automatically in the event

of hardware faults. Hardware faults are over-current, over-temperature, VDD fault, VPC fault, VCC fault, and card

extraction during the session.

The following steps show the deactivation sequence and the timing of the card control signals when the system

controller clears the start/stop bit:

- RST goes low at the end of t1.

- CLK goes low at the end of t2.

- I/O goes low at the end of t3. Out of reception mode.

- Shut down VCC at the end of time t4.

Start/Stop

RST

CLK

IO

VCC

t1

t2

t3 t4

t1 = > .5µs

t2 = > 7.5µs

t3 = > .5µs

t4 = > .5µs

Figure 6 - Deactivation Sequence

Page: 11 of 24

© 2005-2008 TERIDIAN Semiconductor Corporation

Rev 1.5

Share Link: