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74LV541 データシートの表示(PDF) - NXP Semiconductors.

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74LV541
NXP
NXP Semiconductors. NXP
74LV541 Datasheet PDF : 15 Pages
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74LV541
Octal buffer/line driver; 3-state
Rev. 03 — 14 April 2009
Product data sheet
1. General description
The 74LV541 is a low-voltage Si-gate CMOS device that is pin and function compatible
with 74HC541 and 74HCT541.
The 74LV541 has octal non-inverting buffer/line drivers with 3-state outputs. The 3-state
outputs are controlled by the output enable inputs OE1 and OE2. A HIGH on OEn causes
the outputs to assume a high-impedance OFF-state.
2. Features
I Optimized for low voltage applications: 1.0 V to 3.6 V
I Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
I Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
I Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and
Tamb = 25 °C
I ESD protection:
N HBM JESD22-A114E exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
I Non-inverting outputs
I Multiple package options
I Specified from 40 °C to +85 °C and from 40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
74LV541N
40 °C to +125 °C DIP20
74LV541D
40 °C to +125 °C SO20
74LV541DB
40 °C to +125 °C SSOP20
74LV541PW
40 °C to +125 °C TSSOP20
Description
plastic dual in-line package; 20 leads (300 mil)
plastic small outline package; 20 leads;
body width 7.5 mm
plastic shrink small outline package; 20 leads;
body width 5.3 mm
plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
Version
SOT146-1
SOT163-1
SOT339-1
SOT360-1

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