74LV541PW データシートの表示（PDF） - NXP Semiconductors.
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74LV541PW Datasheet PDF : 15 Pages
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NXP Semiconductors
4. Functional diagram
A0
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
Y0
18
Y1
17
Y2
16
Y3
15
Y4
14
Y5
13
Y6
12
Y7
11
OE1
1
19 OE2
Fig 1. Logic symbol
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5. Pinning information
5.1 Pinning
74LV541
OE1 1
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
GND 10
20 VCC
19 OE2
18 Y0
17 Y1
16 Y2
15 Y3
14 Y4
13 Y5
12 Y6
11 Y7
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Fig 3. Pin configuration DIP20, SO20
74LV541
Octal buffer/line driver; 3-state
1
&
19
EN
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
mna180
Fig 2. IEC logic symbol
74LV541
OE1 1
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
GND 10
20 VCC
19 OE2
18 Y0
17 Y1
16 Y2
15 Y3
14 Y4
13 Y5
12 Y6
11 Y7
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Fig 4. Pin configuration, (T)SSOP20
74LV541_3
Product data sheet
Rev. 03 — 14 April 2009
© NXP B.V. 2009. All rights reserved.
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