M29W022 データシートの表示（PDF） - STMicroelectronics

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M29W022

2 Mbit (256Kb x8, Boot Block) Low Voltage Single Supply Flash Memory

STMicroelectronics 

M29W022BT, M29W022BB

Figure 2. TSOP Connections

Figure 3. PLCC Connections

A11

A9

A8

A13

A14

A17

W

VCC

NC

A16

A15

A12

A7

A6

A5

A4

1

32

8 M29W022BT 25

9 M29W022BB 24

16

17

AI02970

G

A10

E

DQ7

DQ6

DQ5

DQ4

DQ3

VSS

DQ2

DQ1

DQ0

A0

A1

A2

A3

A7

A6

A5

A4

A3 9

A2

A1

A0

DQ0

1 32

M29W022BT

M29W022BB

17

A14

A13

A8

A9

25 A11

G

A10

E

DQ7

AI03045

Table 1. Signal Names

A0-A17

Address Inputs

DQ0-DQ7 Data Inputs/Outputs

E

Chip Enable

G

Output Enable

W

Write Enable

VCC

Supply Voltage

VSS

Ground

NC

Not Connected Internally

SUMMARY DESCRIPTION

The M29W022B is a 2 Mbit (256Kb x8) non-vola-

tile memory that can be read, erased and repro-

grammed. These operations can be performed

using a single low voltage (2.7 to 3.6V) supply. On

power-up the memory defaults to its Read mode

where it can be read in the same way as a ROM or

EPROM.

The memory is divided into blocks that can be

erased independently so it is possible to preserve

valid data while old data is erased. Each block can

be protected independently to prevent accidental

Program or Erase commands from modifying the

memory. Program and Erase commands are writ-

ten to the Command Interface of the memory. An

on-chip Program/Erase Controller simplifies the

process of programming or erasing the memory by

taking care of all of the special operations that are

required to update the memory contents. The end

of a program or erase operation can be detected

and any error conditions identified. The command

set required to control the memory is consistent

with JEDEC standards.

The blocks in the memory are asymmetrically ar-

ranged, see Tables 3 and 4, Block Addresses. The

first or last 64 Kbytes have been divided into four

additional blocks. The 16 Kbyte Boot Block can be

used for small initialization code to start the micro-

processor, the two 8 Kbyte Parameter Blocks can

be used for parameter storage and the remaining

32 Kbyte is a small Main Block where the applica-

tion may be stored.

Chip Enable, Output Enable and Write Enable sig-

nals control the bus operation of the memory.

They allow simple connection to most micropro-

cessors, often without additional logic.

The memory is offered in a TSOP32 (8 x 14mm)

and PLCC32 packages and it is supplied with all

the bits erased (set to ’1’).

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