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LC74794 データシートの表示(PDF) - SANYO -> Panasonic

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LC74794
SANYO
SANYO -> Panasonic SANYO
LC74794 Datasheet PDF : 30 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LC74794, 74794M
Continued from preceding page.
Pin no. Pin
Function
9
CS1 Enable input 1
10 SCLK1 Clock input 1
11
SIN1 Data input 1
12
VDD2 Power supply
13
CPOUT Charge pump output
14
VCOIN Oscillator control voltage input
15
VSS3 Ground
16
VDD3 Power supply (+5 V)
17
VCOR Oscillator range adjustment
18
DAV Data present output
19
CVOUT Video signal output
20
VSS2 Ground
21
CVIN Video signal input
22
CVCR Video signal input
23
VDD1 Power supply (+5 V)
24
SYNIN Sync separator circuit input
25
SEPC Sync separator circuit adjustment
26 SEPOUT Composite synchronizing signal output
27
SEPIN Vertical synchronizing signal input
28
CDLR Background color phase adjustment
29
RST Reset input
30
VDD1 Power supply (+5 V)
Notes
Enable input for OSD serial data input
Serial data input is enabled by a low-level input.
(A pull-up resistor is built in so the input has hysteresis characteristics.)
Serial data clock input
(A pull-up resistor is built in so the input has hysteresis characteristics.)
Serial data input (A pull-up resistor is built in so the input has hysteresis characteristics.)
Composite video signal level adjustment power supply (analog system power supply)
The charge pump output. Connect a low-pass filter to this pin.
VCO control voltage input
Ground (VCO ground)
Power supply (+5 V: VCO power supply)
Connection for the VCO range adjustment resistor
Outputs a low level when PDC/VPS data has been received.
Composite video signal output
Ground (analog system ground)
Composite video signal input
SECAM chrominance signal input
Power supply (+5 V: digital system power supply)
Internal sync separator circuit video signal input
Internal sync separator circuit adjustment input
Composite synchronizing signal output for the built-in sync separator circuit. Can be
switched to function as an output for the signal (high or ST. pulse) due to MOD0 by setting
SEL0 high.
Inputs the vertical synchronizing signal created by integrating the SEPOUT pin output
signal.
An integration circuit must be connected to the SEPOUT pin. This pin must be tied to VDD1
if unused.
Background color phase adjustment resistor connection
System reset input
A pull-up resistor is built in so the input has hysteresis characteristics.
Power supply (+5 V: digital system power supply)
No. 5557-3/30

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