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LC74794 データシートの表示(PDF) - SANYO -> Panasonic

部品番号
コンポーネント説明
メーカー
LC74794
SANYO
SANYO -> Panasonic SANYO
LC74794 Datasheet PDF : 30 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LC74794, 74794M
Continued from preceding page.
Parameter
Color burst high level
Background color low level
Background color high level
Frame level 0
Frame level 1
Character level
Symbol
Conditions
CVOUT; VDD1 = 5.0 V Œ
VCBH
VDD2 = 5.0 V 
Ž
CVOUT; VDD1 = 5.0 V Œ
VRSL
VDD2 = 5.0 V 
Ž
CVOUT; VDD1 = 5.0 V Œ
VRSH
VDD2 = 5.0 V 
Ž
CVOUT; VDD1 = 5.0 V Œ
VBK0
VDD2 = 5.0 V 
Ž
CVOUT; VDD1 = 5.0 V Œ
VBK1
VDD2 = 5.0 V 
Ž
CVOUT; VDD1 = 5.0 V Œ
VCHA
VDD2 = 5.0 V 
Ž
Ratings
Unit
min
typ
max
1.67
V
1.87
V
2.17
V
1.23 (1.16)
V
1.43 (1.36)
V
1.73 (1.66)
V
2.37 (2.01)
V
2.57 (2.21)
V
2.87 (2.51)
V
1.50
V
1.70
V
2.00
V
2.08
V
2.28
V
2.58
V
2.65
V
2.85
V
3.15
V
Notes:ΠWhen the sync level is 0.8 V.
 When the sync level is 1.0 V.
Ž When the sync level is 1.3 V.
The values in parentheses for the background color high and low levels are the values for a blue background.
Timing Characteristics at Ta = –30 to +70°C, VDD1 = 5 ± 0.5 V
OSD write (See Figure 1.)
Parameter
Minimum input pulse width
Data setup time
Data hold time
One word write time
Symbol
Conditions
tW(SCLK)
tW(CS1)
tSU(CS1)
tSU(SIN)
th(CS1)
th(SIN)
tword
twt
SCLK1
CS1 (The period when CS1 is high)
CS1
SIN1
CS1
SIN1
The time to write 8 bits of data
The RAM data write time
PDC/VPS reads (For the n-channel open-drain output circuit. See Figure 2.)
Parameter
Symbol
Conditions
tCKCY SCLK2
Minimum input pulse width
tCKL SCLK2
tCKH SCLK2
Setup time
tICK SCLK2
Output delay time
tCKO DOUT
Note: Timings follow those for OSD write when the CMOS output circuit is used.
Ratings
Unit
min
typ
max
200
ns
1
µs
200
ns
200
ns
2
µs
200
ns
4.2
µs
1
µs
min
2
1
1
10
Ratings
typ
Unit
max
µs
µs
µs
µs
0.5
µs
No. 5557-5/30

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