HEF4093B-Q100 データシートの表示（PDF） - NXP Semiconductors.
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HEF4093B-Q100 Datasheet PDF : 14 Pages
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Nexperia
HEF4093B-Q100
Quad 2-input NAND Schmitt trigger
6.2 Pin description
Table 2.
Symbol
1A to 4A
1B to 4B
1Y to 4Y
VDD
VSS
Pin description
Pin
1, 5, 8, 12
2, 6, 9, 13
3, 4, 10, 11
14
7
Description
input
input
output
supply voltage
ground (0 V)
7. Functional description
Table 3.
Input
nA
L
L
H
H
Function table[1]
nB
L
H
L
H
[1] H = HIGH voltage level; L = LOW voltage level.
8. Limiting values
Output
nY
H
H
H
L
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol Parameter
Conditions
Min
Max
Unit
VDD
supply voltage
IIK
input clamping current
VI
input voltage
IOK
output clamping current
VI < 0.5 V or VI > VDD + 0.5 V
VO < 0.5 V or VO > VDD + 0.5 V
0.5
+18
V
-
10
mA
0.5
-
VDD + 0.5 V
10
mA
II/O
input/output current
-
10
mA
IDD
Tstg
Tamb
Ptot
supply current
storage temperature
ambient temperature
total power dissipation
Tamb = 40 C to +125 C
SO14
-
50
mA
65
+150
C
40
+125
C
[1] -
500
mW
P
power dissipation
per output
-
100
mW
[1] For SO14 package: above Tamb = 70 C, Ptot derates linearly with 8 mW/K.
HEF4093B_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2012
© Nexperia B.V. 2017. All rights reserved
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