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X22C12 データシートの表示(PDF) - Xicor -> Intersil

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X22C12
Xicor
Xicor -> Intersil Xicor
X22C12 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
X22C12
MODE SELECTION
CE
WE
H
X
L
H
L
L
L
L
X
H
H
X
X
H
H
X
RECALL
H
H
H
H
L
L
H
H
STORE
H
H
H
H
H
H
L
L
I/O
Output High Z
Output Data
Input Data High
Input Data Low
Output High Z
Output High Z
Output High Z
Output High Z
Mode
Not Selected(3)
Read RAM
Write “1” RAM
Write “0” RAM
Array Recall
Array Recall
Nonvolatile Store(4)
Nonvolatile Store(4)
3817 PGM T05.1
ENDURANCE AND DATA RETENTION
Parameter
Min.
Units
Endurance
Store Cycles
Data Retention
100,000
1,000,000
100
Data Changes Per Bit
Store Cycles
Years
3817 PGM T06
POWER-UP TIMING
Symbol
tPUR(5)
tPUW(5)
Parameter
Power-up to Read Operation
Power-up to Write or Store Operation
Max.
100
5
Units
µs
ms
3817 PGM T07
EQUIVALENT A.C. LOAD CIRCUIT
A.C. CONDITIONS OF TEST
5V
OUTPUT
919
497
100pF
Input Pulse Levels
Input Rise and
Fall Times
Input and Output
Timing Levels
0V to 3V
10ns
1.5V
3817 PGM T04.1
3815 FHD F09.1
Notes: (3) Chip is deselected but may be automatically completing a store cycle.
(4) STORE = LOW is required only to initiate the store cycle, after which the store cycle will be automatically completed
(e.g. STORE = X).
(5) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated. These
parameters are periodically sampled and not 100% tested.
4

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