LTC6991HS6 データシートの表示（PDF） - Analog Devices
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LTC6991HS6 Datasheet PDF : 24 Pages
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LTC6991
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are
(NDIV = 1 to 221), RSET = 50k to 800k, RLOAD = ∞,
at TA = 25°C. Test conditions are V+ =
CLOAD = 5pF unless otherwise noted.
2.25V
to
5.5V,
RST
=
0V,
DIVCODE
=
0
to
15
SYMBOL
Digital I/O
VIH
VIL
IOUT(MAX)
VOH
PARAMETER
RST Pin Input Capacitance
RST Pin Input Current
High Level RST Pin Input Voltage
Low Level RST Pin Input Voltage
Output Current
High Level Output Voltage (Note 7)
VOL
Low Level Output Voltage (Note 7)
tRST
tWIDTH
tr
tf
Reset Propagation Delay
Minimum Input Pulse Width
Output Rise Time (Note 8)
Output Fall Time (Note 8)
CONDITIONS
RST = 0V to V+
(Note 6)
(Note 6)
V+ = 2.7V to 5.5V
V+ = 5.5V
V+ = 3.3V
V+ = 2.25V
V+ = 5.5V
V+ = 3.3V
V+ = 2.25V
V+ = 5.5V
V+ = 3.3V
V+ = 2.25V
V+ = 3.3V
V+ = 5.5V
V+ = 3.3V
V+ = 2.25V
V+ = 5.5V
V+ = 3.3V
V+ = 2.25V
MIN
TYP
MAX
IOUT = –1mA
IOUT = –16mA
IOUT = –1mA
IOUT = –10mA
IOUT = –1mA
IOUT = –8mA
IOUT = 1mA
IOUT = 16mA
IOUT = 1mA
IOUT = 10mA
IOUT = 1mA
IOUT = 8mA
2.5
l 0.7 • V+
l
±10
0.3 • V+
±20
l 5.45
5.48
l 4.84
5.15
l 3.24
3.27
l 2.75
2.99
l 2.17
2.21
l 1.58
1.88
l
0.02
0.04
l
0.26
0.54
l
0.03
0.05
l
0.22
0.46
l
0.03
0.07
l
0.26
0.54
16
24
40
5
1.1
1.7
2.7
1.0
1.6
2.4
UNITS
pF
nA
V
V
mA
V
V
V
V
V
V
V
V
V
V
V
V
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC6991C is guaranteed functional over the operating
temperature range of –40°C to 85°C.
Note 3: The LTC6991C is guaranteed to meet specified performance from
0°C to 70°C. The LTC6991C is designed, characterized and expected to
meet specified performance from –40°C to 85°C but it is not tested or
QA sampled at these temperatures. The LTC6991I is guaranteed to meet
specified performance from –40°C to 85°C. The LTC6991H is guaranteed
to meet specified performance from –40°C to 125°C. The LTC6991MP is
guaranteed to meet specified performance from –55°C to 125°C.
Note 4: Frequency accuracy is defined as the deviation from the fOUT
equation, assuming RSET is used to program the frequency.
Note 5: See Operation section, Table 1 and Figure 2 for a full explanation
of how the DIV pin voltage selects the value of DIVCODE.
Note 6: The RST pin has hysteresis to accommodate slow rising or falling
signals. The threshold voltages are proportional to V+. Typical values can
be estimated at any supply voltage using VRST(RISING) ≈ 0.55 • V+ + 185mV
and VRST(FALLING) ≈ 0.48 • V+ – 155mV.
Note 7: To conform to the Logic IC Standard, current out of a pin is
arbitrarily given a negative value.
Note 8: Output rise and fall times are measured between the 10% and the
90% power supply levels with 5pF output load. These specifications are
based on characterization.
Note 9: Settling time is the amount of time required for the output to settle
within ±1% of the final frequency after a 0.5× or 2× change in ISET .
Note 10: Jitter is the ratio of the deviation of the period to the mean of the
period. This specification is based on characterization and is not 100%
tested.
Note 11: Long-term drift of silicon oscillators is primarily due to the
movement of ions and impurities within the silicon and is tested at 30°C
under otherwise nominal operating conditions. Long-term drift is specified
as ppm/√kHr due to the typically nonlinear nature of the drift. To calculate
drift for a set time period, translate that time into thousands of hours, take
the square root and multiply by the typical drift number. For instance, a
year is 8.77kHr and would yield a drift of 266ppm at 90ppm/√kHr. Drift
without power applied to the device may be approximated as 1/10th of the
drift with power, or 9ppm/√kHr for a 90ppm/√kHr device.
6991fc
4
For more information www.linear.com/LTC6991
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