IR3Y48M データシートの表示（PDF） - Sharp Electronics
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IR3Y48M Datasheet PDF : 31 Pages
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Black Level Cancel Circuit
The purpose of black level cancel is to adjust the
AGC input level which can equalize the ADC output
code to black level code written in the register. The
black level cancelling is generally done during OB
(optical black period) pulsed by OBP pulse. The
register value ((1 to) 16 to 127 LSB : default 64
LSB) is written by serial interface.
Black level cancel loop is established while OBP is
low (when pulse is not inverted).
In this loop, ADC output code is compared with
register setting. During OB period, the OBP voltage
gradually terminates into certain voltage resulting
the output code equal to the register setting.
IR3Y48M
The OBP voltage is discharged under following
status :
q Set black level reset register to 1
w Set RESET pin low
e Power down (by STBYN or register control)
The period to reach the final value depends on the
status of chip. It may take more than one thousand
pixels at start-up or after reset. It may take only
several pixels when the status is not changed. DC
clamp [CCDCLP] is allowed during OBP low.
Black level cancelling for ADIN signal (broken line
in the chart) is controlled by ADCLP pulse (clamp
and OB control are done simultaneously) instead of
OBP.
REFIN
CCDIN
ADIN
OBCAP
CDS
S/H
AGC
Rough
+
AGC
Fine
10-bit
ADC
(Path for ADIN)
DAC
OBP
ADCLP
OBP ADCLP
Compare
Register (7-bit)
Black Level Calibration
DO0-DO9
CCD
Blanking
Effective
Pixel Signal
Optical Black Period
Blanking
Effective
Pixel Signal
ADCK
OBP
OBCAP
Previous
Black Level
Black Level Calibration Timing
Resulting Black
Calibration Level
(Hold)
9
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