HEC4040BT,112 データシートの表示（PDF） - NXP Semiconductors.
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HEC4040BT,112 Datasheet PDF : 14 Pages
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NXP Semiconductors
HEF4040B
12-stage binary ripple counter
a. Input waveforms
VI
negative
pulse
0V
VI
positive
pulse
0V
90 %
10 %
VM
10 %
tf
tr
90 %
VM
tW
90 %
VM
10 %
tr
tf
90 %
VM
10 %
tW
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VDD
VI
G
VO
DUT
RT
CL
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b. Test circuit
Fig 6.
Test data is given in Table 9.
Definitions test circuit:
DUT = Device Under Test;
CL = load capacitance, including the jig and probe capacitance;
RL = load resistance, which should be equal to the output impedance of the pulse generator.
Test circuit for measuring switching times
Table 9. Test data
Supply voltage
VDD
5 V to 15 V
Input
VI
VSS or VDD
tr, tf
20 ns
Load
CL
50 pF
HEF4040B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 17 November 2011
© NXP B.V. 2011. All rights reserved.
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