ICM7243 データシートの表示（PDF） - Renesas Electronics
部品番号
コンポーネント説明
メーカー
ICM7243 Datasheet PDF : 17 Pages
| |||
ICM7243
Pin Descriptions
PIN NUMBER
ICM7243B ICM7243A
SYMBOL 40 Ld PDIP 40 Ld PDIP 44 Ld MQFP
DESCRIPTION
VDD
D0 to D5
1
8 to 13
1
10 to 15
39
4 to 9
-
Six-Bit ASCll Data input pins (active high).
CS, CS
15, 16
16
10
Chip Select from µP address decoder, etc.
WR
17
17
13
WRite pulse input pin (active low). For an active high write pulse, CS can be used, and WR
can be used as CS.
MODE
31
31
29
Selects data entry MODE. High selects Sequential Access (SA) mode where first entry is
displayed in “leftmost” character and subsequent entries appear to the “right”. Low selects
the Random Access (RA) mode where data is displayed on the character addressed via
A0 - A2 Address pins.
A0/SEN
30
30
28
In RA mode it is the LSB of the character Address. In SA mode it is used for cascading
devices for displays of more than 8 characters (active high enables device controller).
A1/CLeaR
29
29
27
In RA mode this is the second bit of the address. In SA mode, a low input will CLeaR the
Serial Address Counter, the Data Memory and the display.
A2/DISPlay
28
28
FULL
26
In RA mode this is the MSB of the Address. In SA mode, the output goes high after eight
entries, indicating DISPlay FULL.
OSC/OFF
27
27
25
OSCillator input pin. Adding capacitance to VDD will lower the internal oscillator frequency.
An external oscillator can be applied to this pin. A low at this input sets the device into a
(shutdown) mode, shutting OFF the display and oscillator but retaining data stored in
memory.
SEGa -
SEGm
2 to 7,
32, 33,
35 to 40
2 to 9,
32, 33,
35 to 40
1 to 3, 30,
31, 33 to 40,
38 to 44 SEGment driver outputs.
D.P.
34
34
32
CHARacter 23 to 26,
1 to 8
18 to 21
23 to 26, 24, 19 to 21, CHARacter driver outputs.
18 to 21
14 to 17
VSS
22
22
18
NC
N/A
N/A
22, 23, 11 No Connect
FN3162 Rev 5.00
October 2, 2015
Page 8 of 17
Share Link: 