UPD70320 データシートの表示（PDF） - NEC => Renesas Technology

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UPD70320

V25™ 16/8-BIT SINGLE-CHIP MICROCONTROLLER

NEC => Renesas Technology 

µPD70320

2. INSTRUCTION SETS

The µPD70320 instruction sets are upward-compatible with those of µPD70108/70116 in native mode.

2.1 Instructions Added to µPD70108/70116

The following instructions are newly added to the µPD70108/70116.

(1) Conditional branch instruction

• BTCLR ······· Bit test instruction used for special function registers

If, when this BTCLR is executed, the target special function register bit status is “1”, the bit is

reset (0) and the program is branched to short-label described in the operand. If the target bit

status is “0”, the program is moved to the next instruction. PSW is not changed in this instruction.

(Descriptive format)

Mnemonic

BTCLR

Special Function

Register Address

sfr

Operand

Special Function

Register Bit

imm3

Branch Address

short-label

(2) Interrupt instructions

• RETRBI ······ Return instruction used for register banks

This instruction is used to return the program from the interrupt service routine in which the

register bank switching function is used. It cannot be used for returning from vectored interrupt

servicing.

(Descriptive format)

Mnemonic

RETRBI

Operand

None

• FINT ··········· This instruction is used to report the interrupt controller that interrupt servicing has ended.

If an interrupt other than NMI, INT, and software interrupt is used, this instruction must be

executed prior to the instruction for returning from interrupt servicing. It should not be used for

NMI, INT and software interrupts.

(Descriptive format)

Mnemonic

FINT

Operand

None

(3) CPU instruction

• STOP ········· Instruction for transition to STOP state

(Descriptive format)

Mnemonic

STOP

Operand

None

9

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