74LCX126 データシートの表示（PDF） - ON Semiconductor

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74LCX126

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

ON Semiconductor 

Connection Diagrams

Pin Assignments for SOIC, SOP, and TSSOP

Logic Symbol

IEEE/IEC

(Top View)

Pad Assignments for DQFN

(Top Through View)

(Bottom View)

Pin Description

Pin Names

Description

An

Inputs

OEn

Output Enable Inputs

On

Outputs

DAP

No Connect

Note: DAP (Die Attach Pad)

Truth Table

Inputs

OEn

An

H

L

H

H

L

X

H = HIGH Voltage Level

L = LOW Voltage Level

Z = High Impedance

X = Immaterial

Output

On

L

H

Z

©2000 Fairchild Semiconductor Corporation

74LCX126 Rev. 1.5.1

2

www.fairchildsemi.com

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