Q67100-Q1115 データシートの表示（PDF） - Siemens AG

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Q67100-Q1115

3.3V 4M x 4-Bit Dynamic RAM 2k & 4k-Refresh

Siemens AG 

HYB 3116(7)400BJ/BT(L) -50/-60/-70

3.3V 4M x 4-DRAM

DC Characteristics (values in brackets for HYB 3117400)(cont’d)

TA = 0 to 70 ˚C, VSS = 0 V, VCC = 3.3 V ± 0.3 V, tT = 5 ns

Parameter

Symbol Limit Values

min.

max.

Unit Test

Condition

Average VCC supply current,

ICC4

during fast page mode: -50 ns version

–

-60 ns version

–

-70 ns version

–

(RAS = VIL, CAS, address cycling, tPC = tPC min.)

Standby VCC supply current

(RAS = CAS = VCC – 0.2 V)

ICC5

–

40 (40)

35 (35)

30 (30)

mA 2) 3) 4)

mA 2) 3) 4)

mA 2) 3) 4)

1

mA 1)

200

µA L-version

Average VCC supply current, during CAS-

ICC6

before-RAS refresh mode: -50 ns version

–

-60 ns version

–

-70 ns version

–

(RAS, CAS cycling, tRC = tRC min.)

Average Self Refresh Current

ICC7

–

(CBR cylce with tRAS > tRASSmin., CAS held low,

WE = VCC – 0.2 V, Address and

Din = VCC – 0.2 V or 0.2 V)

100(120) mA 2) 4)

90 (110) mA 2) 4)

80 (100) mA 2) 4)

1

mA

250

µA L-version

Capacitance

TA = 0 to 70 ˚C, VCC = 3.3 V ± 0.3 V, f = 1 MHz

Parameter

Symbol

Limit Values

Unit

min.

max.

Input capacitance (A0 to A10, A11)

Input capacitance (RAS, CAS, WE, OE)

I/O capacitance (I/O1 - I/O4)

CI1

–

5

pF

CI2

–

7

pF

CIO

–

7

pF

Semiconductor Group

7

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