ICS9169C-26 データシートの表示（PDF） - Integrated Circuit Systems
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ICS9169C-26 Datasheet PDF : 5 Pages
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ICS169C-26
Preliminary Product Preview
Pin Descriptions
PIN NUMBER
1, 7, 13, 27, 33
2
3
4, 10, 16, 23, 30
5, 6, 8, 9, 11, 12, 14, 15
17, 18, 19
20
21, 22, 24, 25, 26, 28, 29
31
32
34, 35, 36
PIN NAME
VDD
X1
X2
GND
CPU(1:8)
FS(1:2)
BSEL
BUS(1:7)
48MHz
24MHz
REF(1:3)
TYPE
PWR
IN
OUT
PWR
OUT
IN
IN
OUT
OUT
OUT
OUT
DESCRIPTION
Power for control logic, PLL and output buffers.
XTAL or external reference frequency input. This input
includes XTAL load capacitance and feedback bias for a 12 -
16 MHz crystal, nominally 14.31818 Mhz.
XTAL output which includes XTAL load capacitance.
Ground for logic, PLL and output buffers.
Processor clock outputs which are a multiple of the input
reference frequency as shown in the table above.
Frequency multiplier select pins. See table above. These inputs
have internal pull-up devices.
Selector for synchronous or asynchronous bus operation.
Bus clock outputs.
Fixed 48 MHz clock (with 14.318 MHz input).
Fixed 24 MHz clock (with 14.318 MHz input).
REF is a buffered copy of the crystal oscillator or reference
input clock, nominally 14.31818 Mhz.
2
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