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TDA8034AT データシートの表示(PDF) - NXP Semiconductors.

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TDA8034AT
NXP
NXP Semiconductors. NXP
TDA8034AT Datasheet PDF : 30 Pages
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NXP Semiconductors
7. Pinning information
7.1 Pinning
TDA8034T; TDA8034AT
Smart card interface
XTAL1 1
XTAL2 2
VDD(INTF) 3
RSTIN 4
CMDVCCN 5
CLKDIV1 6
PRESN 7
I/O 8
16 I/OUC
15 OFFN
14 VDD
TDA8034T 13 VDDP
TDA8034AT
TDA8034BT 12 VCC
11 RST
10 CLK
9 GND
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Fig 2. Pin configuration (SO16)
7.2 Pin description
Table 3. Pin description
Symbol Pin Supply Type[1] Description
XTAL1
1
XTAL2
2
VDD(INTF)
3
RSTIN
4
CMDVCCN 5
CLKDIV1 6
PRESN 7
I/O
8
GND
9
VDD
I
VDD
O
VDD(INTF) P
VDD(INTF) I
VDD(INTF) I
VDD(INTF) I
VDD(INTF) I
VCC
I/O
-
G
crystal connection input
crystal connection output
interface supply voltage
microcontroller card reset input; active HIGH
microcontroller start activation sequence input; active LOW
sets the clock frequency on pin CLK; see Table 4 on page 7
card presence contact input; active LOW[2]
card input/output data line (C7)[3]
ground
CLK
RST
VCC
10 VCC
O
card clock (C3)
11 VCC
O
card reset (C2)
12 VCC
P
card supply (C1); decouple to pin GND using one 470 nF capacitor close to pin VCC
and one 220 nF capacitor close to card socket contact C1 with an ESR < 100 m[4]
VDDP
VDD
OFFN
I/OUC
13 VDDP
P
14 VDD
P
15 VDD(INTF) O
16 VDD(INTF) I/O
low-dropout regulator input supply voltage
digital supply voltage
NMOS interrupt to microcontroller[5]; active LOW; see Section 8.9 on page 11
microcontroller input/output data line[6]
[1] I = input, O = output, I/O = input/output, G = ground and P = power supply.
[2] If pin PRESN is LOW, the card is considered to be present. During card insertion, debouncing can occur on these signals. To counter
this, the TDA8034T/TDA8034AT has a built-in debouncing timer (typically 4.5 ms).
[3] Uses an internal 11 kpull-up resistor connected to pin VCC.
[4] Using a 220 nF capacitor increases the noise margin on pin VCC.
TDA8034T_TDA8034AT
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3.1 — 13 December 2012
© NXP B.V. 2012. All rights reserved.
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