SA639 データシートの表示（PDF） - Philips Electronics

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SA639

Low voltage mixer FM IF system with filter amplifier and data switch

Philips Electronics 

Philips Semiconductors

Low voltage mixer FM IF system with filter amplifier

and data switch

Product specification

SA639

AC ELECTRICAL CHARACTERISTICS (Continued)

LIMITS

SYMBOL

PARAMETER

TEST CONDITIONS

SA639

UNITS

MIN

-3σ

TYP

+3σ

MAX

Post detection filter amplifier

Amplifier 3dB bandwidth

Amplifier gain

Slew rate

Input resistance

AC coupled: RL = 10kΩ,

CL = 33pF

AC coupled: RL = 10kΩ,

VOUT DC = 1.6V

AC coupled: RL = 10kΩ,

CL = 33pF

11.7

12.8

13.8

-0.2

2.4

300

MHz

dB

V/µs

kΩ

Input capacitance

3

pF

Output impedance

Output load resistance

Output load capacitance1

DC output level2

AC coupled

AC coupled

150

800

Ω

5

kΩ

30

pF

1.5

1.682

1.7

1.718

1.9

V

Data switch

DC input voltage range3

1.2

1.6

2.0

V

AC input swing

Input impedance

400

100

mVP-P

kΩ

Input capacitance

5

pF

Output load resistance

500

Ω

Through Mode (Pin 12 = LOW)

AC voltage gain4

-1.5

dB

Output drive capability

Slew rate

Static offset voltage5

Dynamic offset voltage2, 6

Sink/source, VOUT DC = 1.6V

3

VOUT DC = 1.6V

VIN DC = 1.2 to 2.0V

VIN DC = 1.4 to 2.0V;

VCC = 3.0 to 5.0V;

-7

RF level = -70 to -40 dBm

VIN DC = 1.4 to 2.0V;

VCC = 3.0 to 5.0V;

-10

RF level = -40 to -5 dBm

>14.0

-0.6

0.30

1.2

mA

V/µs

±5

mV

+7

mV

+10

Tri-State Mode (Pin 12 = HIGH)

Output leakage current

VOUT DC = 1.2 to 2.0V

9.5

20

30.5

100

nA

NOTES:

1. Includes filter feedback capacitance, comparator input capacitance. PCB stray capacitances and switch input capacitance.

2. Demodulator output DC coupled with Post Detection Filter Amplifier input and the demodulator tank exactly tuned to center frequency.

3. Includes DC offsets due to frequency offsets between Rx and Tx carrier and demodulator tank offset due to mis-tuning.

4. With a 400mVP-P sinusoid at 600kHz driving Pin 10. Output load resistance 500Ω in series with 10nF.

5. With a DC input and capacitor in the RC load fully charged.

6. The switch is closed every 10ms for a duration of 40µs. The DC offset is determined by calculating the difference of 2 DC measurements,

which are determined as follows: 1) The first DC value is measured at the integrating capacitor of the switch when the switch is in the closed

position immediately before it opens. The value to be measured is in the middle of the peak-to-peak excursion of the superimposed

sine-wave. (DClow + (DChigh – DClow)/2). 2) The second DC value (calculated as above) is measured at Pin 11 immediately after the

switch opens, and is the DC value which gives the largest DC offset to the first DC measurement within a 400µs DECT burst. Minimum and

maximum limits are not tested, however, they are guaranteed by design and characterization using an optimized layout and application

circuit.

7. Standard deviations are measured based on application of 60 parts.

1998 Feb 10

5

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