LB11826 データシートの表示（PDF） - ON Semiconductor
部品番号
コンポーネント説明
メーカー
LB11826 Datasheet PDF : 11 Pages
| |||
LB11826
Continued from preceding page.
Parameter
Symbol
Conditions
Speed discriminator
Output H level voltage
Output L level voltage
Number of counts
VOH (D)
VOL (D)
IDO = -0.1mA
IDO = 0.1mA
PLL output
Output H level voltage
Output L level voltage
Lock detection
VOH (P)
VOL (P)
IPO = -0.1mA
IDO = 0.1mA
Output L level voltage
Lock range
VOL (LD) ILD = 10mA
Integrator
Input bias current
IB (INT)
Output H level voltage
Output L level voltage
Open-loop gain
VOH (INT)
VOL (INT)
IINTO = -0.2mA
IINTO = 0.2mA
f (INT) = 1kHz
Gain width product
Design target value*
Reference voltage
Design target value*
Clock input pin
Operating frequency range
L level pin voltage
H level pin current
Start/Stop pin
fOSC
VOSCL
IOSCH
IOSC = -0.5mA
VOSC = VOSCL + 0.5V
H level input voltage range
L level input voltage range
Input open voltage
Hysteresis width
H level input current
L level input current
Forward/Reverse pin
VIH (S/S)
VIL (S/S)
VIO (S/S)
ΔVIN
IIH (S/S)
IIL(S/S)
V (S/S) = VREG
V (S/S) = 0V
H level input voltage range
L level input voltage range
Input open voltage
Hysteresis width
H level input current
L level input current
VIH (F/R)
VIL (F/R)
VIO (F/R)
ΔVIN
IIH (F/R)
IIL(F/R)
V (F/R) = VREG
V (F/R) = 0V
Note : * These items are design target values and are not tested.
Ratings
Unit
min
typ
max
VREG-1.0 VREG-0.7
0.8
512
V
1.1
V
VREG-1.8 VREG-1.5 VREG-1.2
V
1.2
1.5
1.8
V
0.15
0.5
V
6.25
%
-0.4
VREG-1.2 VREG-0.8
0.8
45
51
450
-5% VREG/2
0.4
μA
V
1.2
V
dB
kHz
5%
V
1 MHz
1.55
V
0.4
mA
3.5
0
VREG-0.5
0.35
-10
-280
VREG
V
1.5
V
VREG
V
0.50
0.65
V
0
10
μA
-210
μA
3.5
0
VREG-0.5
0.35
-10
-280
VREG
V
1.5
V
VREG
V
0.50
0.65
V
0
10
μA
-210
μA
No.7109-3/11
Share Link: 