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Q62702-G0080(1999) データシートの表示(PDF) - Infineon Technologies

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Q62702-G0080
(Rev.:1999)
Infineon
Infineon Technologies Infineon
Q62702-G0080 Datasheet PDF : 22 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
GaAs MMIC
CGY 196
_________________________________________________________________________________________________________
Functional Block Diagram
VD1
VD2
RFin/Vg
GND
GND
GND
R Fo u t/V d 3
Pin #
1
2
3
4
5
6
7
8
Configuration
RFin/Vg RF input power + Gate voltage [0V internal]
GND RF and DC ground
VD2
Pos. drain voltage of the 2nd stage
n.c.
not connected
n.c.
not connected
RFout/VD3 RF output power / Pos. drain voltage of the 3rd stage
GND RF and DC ground
VD1
Pos. drain voltage of the 1st stage
DC characteristics
Characteristics
Drain current
stage 1
stage 2
stage 3
Transconductance stage 1
stage 2
stage 3
Symbol Conditions
IDSS1 VD1=3V
IDSS2 VD2=3V
IDSS2 VD2=3V
gfs1
VD=3V, ID=50mA
gfs2
VD=3V, ID=300mA
gfs3
VD=3V, ID=300mA
min typ max Unit
30
45
75
mA
45
65 110 mA
230 340 515 mA
50
90 130 mS
80 130 170 mS
150 220 300 mS
Determination of Permissible Total Power Dissipation for Continuous and Pulse
Operation
Infineon Aktiengesellschaft
2
01.3.1999
GS PD GaAs

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