FAN48630UC37AX データシートの表示（PDF） - ON Semiconductor
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FAN48630UC37AX Datasheet PDF : 17 Pages
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Pin Configuration
EN PG
VIN
A1
A2
A3
A4
VSEL AGND VOUT
B1
B2
B3
B4
BYP
C1
C2
SW
C3
C4
AGND
PGND
D1
D2
D3
D4
Figure 3. Top Through View (Bumps Down)
A4
A3
A2
A1
B4
B3
B2
B1
C4
C3
C2
C1
D4
D3
D2
D1
Figure 4. Bottom View (Bumps Up)
Pin Definitions
Pin #
Name
Description
A1
EN
Enable. When this pin is HIGH, the circuit is enabled.(3)
A2
A3–A4
PG
Power Good. This is an open-drain output. PG is actively pulled LOW if output falls out of
regulation due to overload or if thermal protection threshold is exceeded.
VIN
Input Voltage. Connect to Li-Ion battery input power source.(3)
B1
VSEL Output Voltage Select. When boost is running, this pin can be used to select output voltage.
B2, C2
D1
AGND
Analog Ground. This is the signal ground reference for the IC. All voltage levels are measured
with respect to this pin.
B3–B4
VOUT Output Voltage. Place COUT as close as possible to the device.
C1
BYP
Bypass. This pin can be used to activate Forced Bypass Mode. When this pin is LOW, the
bypass switches (Q3 and Q1) are turned on and the IC is otherwise inactive.
C3–C4
SW
Switching Node. Connect to inductor.
D2–D4
PGND
Power Ground. This is the power return for the IC. The COUT bypass capacitor should be
returned with the shortest path possible to these pins.
Note:
3. Do not connect the EN pin to VIN. A logic voltage of 1.8 V should control the EN pin and enable / disable the device.
© 2011 Fairchild Semiconductor Corporation
FAN48630 • Rev. 1.13
3
www.fairchildsemi.com
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