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HD74LVC244ATELL データシートの表示(PDF) - Renesas Electronics

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HD74LVC244ATELL
Renesas
Renesas Electronics Renesas
HD74LVC244ATELL Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
HD74LVC244A
Octal Buffers / Line Drivers with 3-state Outputs
REJ03D0352–0400Z
(Previous ADE-205-110B (Z))
Rev.4.00
Jul. 27, 2004
Description
The HD74LVC244A has eight line drivers with three state outputs in a 20 pin package. This device is a non inverting
buffer and has two active low enables (1G and 2G). Each enable independently controls four buffers. Low voltage and
high-speed operation is suitable at the battery drive product (note type personal computer) and low power consumption
extends the life of a battery for long time operation.
Features
VCC = 2.0 V to 5.5 V
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
High output current ±24 mA (@VCC = 3.0 V to 5.5 V)
Ordering Information
Part Name
Package Type
Package Code
HD74LVC244AFPEL
SOP–20 pin (JEITA) FP–20DAV
HD74LVC244ATELL
TSSOP–20 pin
TTP–20DAV
Note: Please consult the sales office for the above package availability.
Package
Abbreviation
FP
T
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
ELL (2,000 pcs/reel)
Function Table
Inputs
G
A
H
X
L
H
L
L
H: High level
L: Low level
X: Immaterial
Z: High impedance
Output Y
Z
H
L
Rev.4.00 Jul. 27, 2004 page 1 of 6

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