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HIP1012A データシートの表示(PDF) - Renesas Electronics

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HIP1012A
Renesas
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HIP1012A Datasheet PDF : 15 Pages
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HIP1012A
Dual Power Distribution Controller
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DATASHEET
FN4419
Rev 6.00
March 2004
The HIP1012A is a HOT SWAP dual supply power distribution
controller. Two external N-Channel MOSFETs are driven to
distribute power while providing load fault isolation.
At turn-on, the gate of each external N-Channel MOSFET is
charged with a 10A current source. Capacitors on each
gate (see the Typical Application Diagram), create a
programmable ramp (soft turn-on) to control inrush currents.
A built in charge pump supplies the gate drive for the 12V
supply N-Channel MOSFET switch.
Overcurrent protection is facilitated by two external current
sense resistors. When the current through either resistor
exceeds the user programmed value the controller enters the
current regulation mode. The time-out capacitor, CTIM, starts
charging as the controller enters the time out period. Once
CTIM charges to a 2V threshold, the N-Channel MOSFETs are
latched off. In the event of a fault at least three times the
current limit level, the N-Channel MOSFET gates are pulled
low immediately before entering time out period. The
controller is reset by a rising edge on either PWRON pin.
Choosing the voltage selection mode the HIP1012 controls
either +12V/5V or +3.3V/+5V supplies.
Ordering Information
PART NUMBER
TEMP.
RANGE (°C)
PACKAGE
PKG.
DWG. #
HIP1012ACB
-0 to 70 14 Ld SOIC
M14.15
HIP1012ACBZA (Note) -0 to 70 14 Ld SOIC( Pb-free) M14.15
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
Features
• HOT SWAP Dual Power Distribution Control for +5V and
+12V or +5V and +3.3V
• Provides Fault Isolation
• Programmable Current Regulation Level
• Programmable Time Out
• Charge Pump Allows the Use of N-Channel MOSFETs
• Power Good and Overcurrent Latch Indicators
• Enhanced Overcurrent Sensitivity Available
• Redundant Power On Controls
• Adjustable Turn-On Ramp
• Protection During Turn-On
• Two Levels of Current Limit Detection Provide Fast
Response to Varying Fault Conditions
• Less Than 1s Response Time to Dead Short
• 3s Response Time to 200% Current Overshoot
• Pb-Free Package Option
• Tape & Reel Packaging with ‘-T’ Part Number Suffix
Applications
• Redundant Array of Independent Disks (RAID) System
• Power Distribution Control
• Hot Plug, Hot Swap Components
Pinout
HIP1012A (SOIC)
TOP VIEW
3/12VS 1
3/12VG 2
VDD 3
MODE/ 4
PWRON1
PWRON2 5
5VG 6
5VS 7
14 3/12VISEN
13 RILIM
12 GND
11 CPUMP
10 CTIM
9 PGOOD
8 5VISEN
Typical Application Diagram
OPTIONAL
VDD RFILTER
CFILTER
CPUMP
RSENSE
12V
RGATE
HIP1012A
CGATE
POWER ON
INPUTS
3/12VS 3/12VISEN
3/12VG
VDD
M/PON1
RILIM
GND
CPUMP
PWRON2
CTIM
5V
RGATE 5VG
5VS
PGOOD
5ISEN
CGATE
RSENSE
RLOAD
RILIM
CTIM
5V OR 3.3V
RLOAD
FN4419 Rev 6.00
March 2004
Page 1 of 15

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