HI5741 データシートの表示（PDF） - Renesas Electronics
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HI5741 Datasheet PDF : 13 Pages
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HI5741
transition (and every subsequent 1024 code transitions
thereafter). This split R/2R segmented current source
architecture, which decreases the amount of current switching
at any one time, makes the glitch practically constant over the
entire output range. By making the glitch a constant size over
the entire output range this effectively integrates this error out
of the end application.
In measuring the output glitch of the HI5741 the output is
terminated into a 64 load. The glitch is measured at any one
of the current cell carry (code 1023 to 1024 transition or any
multiple thereof) throughout the DACs output range.
The glitch energy is calculated by measuring the area under
the voltage-time curve. Figure 25 shows the area considered
as glitch when changing the DAC output. Units are typically
specified in picoVolt/seconds (pV/s).
HI5741
(21) IOUT
100MHz
LOW PASS
SCOPE
FILTER
64
50
FIGURE 24. GLITCH TEST CIRCUIT
a (mV)
GLITCH ENERGY = (a x t)/2
t (ns)
FIGURE 25. MEASURING GLITCH ENERGY
Applications
Bipolar Applications
To convert the output of the HI5741 to a bipolar 4V swing, the
following applications circuit is recommended. The reference
can only provide 125A of drive, so it must be buffered to
create the bipolar offset current needed to generate the -2V
output with all bits ‘off’. The output current must be converted
to a voltage and then gained up and offset to produce the
proper swing. Care must be taken to compensate for the
voltage swing and error.
REF OUT
(26)
-
+
5k
1/2 CA2904
5k
-
+
1/2 CA2904
60
HI5741
IOUT
(21)
0.1F
50
240
240
-
VOUT
+
HFA1100
FIGURE 26. BIPOLAR OUTPUT CONFIGURATION
Interfacing to the HSP45106 NCO-16
The HSP45106 is a 16-bit Numerically Controlled Oscillator
(NCO). The HSP45106 can be used to generate various
modulation schemes for Direct Digital Synthesis (DDS)
applications. Figure 27 shows how to interface an HI5741 to
the HSP45106.
Definition of Specifications
Integral Linearity Error (INL) is the measure of the worst
case point that deviates from a best fit straight line of data
values along the transfer curve.
Differential Linearity Error (DNL) is the measure of the error in
step size between adjacent codes along the converter’s transfer
curve. Ideally, the step size is 1 LSB from one code to the next,
and the deviation from 1 LSB is known as DNL. A DNL
specification of greater than -1 LSB guarantees monotonicity.
Feedthru is the measure of the undesirable switching noise
coupled to the output.
Output Voltage Full Scale Settling Time is the time required
from the 50% point on the clock input for a full scale step to
settle within an 1/2 LSB error band.
Output Voltage Small Scale Settling Time is the time
required from the 50% point on the clock input for a 100mV
step to settle within an 1/2 LSB error band. This is used by
applications reconstructing highly correlated signals such as
sine waves with more than 5 points per cycle.
Glitch Area (GE) is the switching transient appearing on the
output during a code transition. It is measured as the area
under the curve and expressed as a volt • time specification
(typically pV-s).
Differential Gain (AV) is the gain error from an ideal sine
wave with a normalized amplitude.
Differential Phase () is the phase error from an ideal sine
wave.
FN4071 Rev 12.00
September 20, 2006
Page 11 of 13
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