MACH215-15 データシートの表示（PDF） - Lattice Semiconductor
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MACH215-15 Datasheet PDF : 30 Pages
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From Logic
n
Allocator
To I/O From Logic
n
Cell
Allocator
To I/O
Cell
To Switch
Matrix
a. Combinatorial, Active High
Individual
Preset
From Logic n
Allocator
CLK0
Individual
Clock
Individual
Preset
To Switch
Matrix
D APQ
AR
To I/O
Cell
To Switch
Matrix
b. Combinatorial, Active Low
Individual
Preset
From Logic n
Allocator
CLK0
Individual
Clock
Individual
Preset
To Switch
Matrix
D APQ
AR
To I/O
Cell
c. D-type Register, Active High
Individual
Preset
From Logic n
Allocator
CLK0
Individual
Clock
Individual
Preset
To Switch
Matrix
T APQ
AR
To I/O
Cell
e. T-type Register, Active High
d. D-type Register, Active Low
Individual
Preset
From Logic n
Allocator
CLK0
Individual
Clock
Individual
Preset
To Switch
Matrix
T APQ
AR
To I/O
Cell
f. T-type Register, Active Low
Individual
Preset
From Logic n
Allocator
CLK0
Individual
Clock
Individual
Preset
To Switch
Matrix
L APQ
G AR
g. Latch, Active High
To I/O
Cell
Individual
Preset
From Logic n
Allocator
CLK0
Individual
Clock
Individual
Preset
To Switch
Matrix
L APQ
G AR
h. Latch, Active Low
Figure 4. Output Macrocell Configurations
To I/O
Cell
16751E-6
10
MACH215-12/15/20
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