MACH215-24 データシートの表示（PDF） - Lattice Semiconductor

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MACH215-24

High-Density EE CMOS Programmable Logic

Lattice Semiconductor 

BLOCK DIAGRAM

I/O0–I/O7

I/O8–I/O15

I0–I1,

I3–I4

I/O Cells

8

8

I/O Cells

8

8

Output

Macrocells

Input

Macrocells

OE

CLK

44x64

8

AND Logic Array

and

Logic Allocator

88

Output

Macrocells

Input

Macrocells

OE

CLK

44x64

8

AND Logic Array

and

Logic Allocator

88

4

22

22

Switch Matrix

22

44x64

AND Logic Array

and

8

Logic Allocator

OE

CLK

88

Output

Macrocells

Input

Macrocells

22

44x64

AND Logic Array

and

8

Logic Allocator

OE

CLK

8 82

Output

Macrocells

Input

Macrocells

8

I/O Cells

8

8

I/O Cells

8

I/O24–I/O31

I/O16–I/O23

CLK0/I2 CLK1/I5

16751E-1

2

MACH215-12/15/20

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