MACH215-15 データシートの表示（PDF） - Lattice Semiconductor

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MACH215-15

High-Density EE CMOS Programmable Logic

Lattice Semiconductor 

The output macrocell sends its output back to the switch

matrix, via internal feedback, and to the I/O cell. The

feedback is always available regardless of the configu-

ration of the I/O cell. This allows for buried combinatorial

or registered functions, freeing up the I/O pins for use as

inputs if not needed as outputs. The basic output

macrocell configurations are shown in Figure 4.

The clock/latch-enable for each individual output mac-

rocell can be driven by one of four signals. Two of the

signals are provided by the global clock pin CLK0/LE0;

either polarity may be chosen. The other two signals

come from a product term provided for each output

macrocell. Either polarity of the logic generated by the

product term can be chosen. The global clock pin is also

available as an input, although care must be taken when

a signal acts as both clock and input to the same device.

Each individual output macrocell also has a product

term for asynchronous reset and a product term for

asynchronous preset. This means that any register or

latch may be reset or preset without affecting any other

register or latch in the device. The functionality of the

flip-flops with respect to initialization is illustrated in

Table 3.

Table 3. Asynchronous Reset/Preset Operation

AR

AP

CLK/LE

Q+

0

0

X

See Table 12

0

1

X

1

1

0

X

0

1

1

X

0

The input macrocell (Figure 5) consists of a flip-flop that

can be used to provide registered or latched inputs. The

flip-flop can be clocked by either polarity of one of the

two global clock/latch-enable pins.

Reset or preset are not provided for these flip-flops. If

combinatorial inputs are desired, this macrocell is not

used, and the feedback from the I/O pin is used directly.

Both the I/O pin feedback and the output of the input

register or latch are always available to the switch

matrix.

Possible input macrocell configurations are shown in

Figure 6.

The I/O Cell

The I/O cell (Figure 7) provides a three-state output

buffer. The three-state control is provided by an

individual product term for each I/O cell. Depending on

the logic programmed onto this product term, the I/O pin

can be configured as an output, an input, or a

bidirectional pin. The feedback from the I/O pin is always

available to the switch matrix, regardless of the state of

the output buffer or the output macrocell.

MACH215-12/15/20

7

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