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HDLX-2416 データシートの表示(PDF) - Broadcom Corporation

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HDLX-2416 Datasheet PDF : 18 Pages
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HDLx-2416 Series
Data Sheet
Display Internal Block Diagram
Figure 1 shows the HDLX-2416 display internal block diagram.
The CMOS IC consists of a 4×7 Character RAM, a 2×4 Attribute
RAM, a 5-bit Control Register, a 128 character ASCII decoder
and the refresh circuitry necessary to synchronize the decoding
and driving of four 5×7 dot matrix displays.
Four 7-bit ASCII words are stored in the Character RAM. The IC
reads the ASCII data and decodes it via the 128 character ASCII
decoder. The ASCII decoder includes the 64 character set of the
HPDL-2416, 32 lower case ASCII symbols, and 32 foreign
language symbols.
A 5-bit word is stored in the Control Register. Three fields
within the Control Register provide an 8-level brightness
control, master blank, and extended functions disable.
For each display digit location, two bits are stored in the
Attribute RAM. One bit is used to enable a cursor character at
each digit location. A second bit is used to individually disable
the blanking features at each digit location.
The display is blanked and dimmed through an internal
blanking input on the row drivers. Logic within the IC allows
the user to dim the display either through the BL input or
through the brightness control in the control register. Similarly
the display can be blanked through the BL input, the Master
Blank in the Control Register, or the Digit Blank Disable in the
Attribute RAM.
Broadcom
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