BS62UV256TCP10(2008) データシートの表示（PDF） - Brilliance Semiconductor

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BS62UV256TCP10
(Rev.:2008)

Ultra Low Power CMOS SRAM 32K X 8 bit

Brilliance Semiconductor 

„ SWITCHING WAVEFORMS (READ CYCLE)

READ CYCLE 1 (1,2,4)

tRC

ADDRESS

DOUT

tAA

tOH

READ CYCLE 2 (1,3,4)

CE

DOUT

tACS

tCLZ(5)

READ CYCLE 3 (1, 4)

ADDRESS

OE

CE

DOUT

tRC

tAA

tOE

tOLZ

tACS

tCLZ(5)

NOTES:

1. WE is high in read Cycle.

2. Device is continuously selected when CE = VIL.

3. Address valid prior to or coincident with CE transition low.

4. OE = VIL.

5. Transition is measured ± 500mV from steady state with CL = 5pF.

The parameter is guaranteed but not 100% tested.

R0201-BS62UV256

5

BS62UV256

tOH

tCHZ (5)

tOH

tOHZ(5)

tCHZ(1,5)

Revision 2.7

Oct.

2008

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