CD4017BMS データシートの表示（PDF） - Renesas Electronics
部品番号
コンポーネント説明
メーカー
CD4017BMS Datasheet PDF : 10 Pages
| |||
CD4017BMS, CD4022BMS
Logic Diagram (Continued)
CARRY
0
1
2
3
4
5
6
7
OUT
2
1
3
7
11
4
5
10
12
*RESET
15
D Q1
C Q1
R
D Q2
C Q2
R
D Q3
C Q3
R
D Q4
C Q4
R
VDD
*CLOCK
14
13
*CLOCK
INHIBIT
Timing Diagram
* All Inputs Protected by CMOS Protection Network
VSS
FIGURE 2. CD4022BMS
CLOCK
RESET
CLOCK
INHIBIT
“0”
“1”
“2”
“3”
“4”
“5”
“6”
“7”
“8”
“9”
CARRY
OUT
0
0
1
2
3
4
5
6
7
8
9
1
2
FIGURE 3. CD4017BMS
CLOCK
RESET
CLOCK
INHIBIT
“0” 0
0
0
“1”
1
1
“2”
2
2
“3”
3
3
“4”
4
4
“5”
“6”
“7”
CARRY
OUT
5
6
7
5
6
7
FIGURE4. CD4022BMS
FN3297 Rev 0.00
August 1998
Page 7 of 10
Share Link: 