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74HC132-Q100 データシートの表示(PDF) - NXP Semiconductors.

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74HC132-Q100
NXP
NXP Semiconductors. NXP
74HC132-Q100 Datasheet PDF : 19 Pages
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Nexperia
74HC132-Q100; 74HCT132-Q100
Quad 2-input NAND Schmitt trigger
6.2 Pin description
Table 2. Pin description
Symbol
1A to 4A
1B to 4B
1Y to 4Y
GND
VCC
Pin
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
14
Description
data input
data input
data output
ground (0 V)
supply voltage
7 Functional description
Table 3. Function table [1]
Input
nA
nB
L
L
L
H
H
L
H
H
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.
Output
nY
H
H
H
L
8 Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Max Unit
VCC
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
VI < -0.5 V or VI > VCC + 0.5 V
VO < -0.5 V or VO > VCC + 0.5 V
-0.5
[1]
-
[1]
-
-0.5 V < VO < VCC + 0.5 V
-
-
-50
-65
SO14, TSSOP14 and DHVQFN14 packages [2] -
+7 V
±20 mA
±20 mA
±25 mA
50 mA
- mA
+150 °C
500 mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO14 package: Ptot derates linearly with 8 mW/K above 70 °C.
For TSSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 °C.
For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 °C.
74HC_HCT132_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 12 June 2018
© Nexperia B.V. 2018. All rights reserved.
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