May 2010
FIN1017
3.3V LVDS, 1-Bit, High-Speed Differential Driver
Features
Greater than 600Mbs Data Rate
3.3V Power Supply Operation
0.5ns Maximum Differential Pulse Skew
1.5ns Maximum Propagation Delay
Low Power Dissipation
Power-Off Protection
Meets or Exceeds the TIA/EIA-644 LVDS Standard
Flow-Through Pinout Simplifies PCB Layout
8-Lead SOIC and US8 Packages Save Space
Description
This single driver is designed for high-speed
interconnects utilizing Low Voltage Differential Signaling
(LVDS) technology. The driver translates LVTTL signal
levels to LVDS levels with a typical differential output
swing of 350mV, which provides low EMI at ultra-low
power dissipation even at high frequencies. This device
is ideal for high-speed transfer of clock or data.
The FIN1017 can be paired with its companion receiver,
the FIN1018, or with any other LVDS receiver.
Ordering Information
Part Number
FIN1017MX
FIN1017K8X
Operating
Temperature Range
-40 to +85°C
-40 to +85°C
Package
8-Lead Small Outline Integrated Circuit (SOIC),
JEDEC MS-012, 0.150inch Narrow
8-Lead US8, JEDEC MO-187, Variation CA
3.1mm Wide
Packing
Method
Tape and Reel
Tape and Reel
© 2001 Fairchild Semiconductor Corporation
FIN1017 • Rev. 1.0.3
www.fairchildsemi.com