HCS373K データシートの表示（PDF） - Intersil

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HCS373K

Radiation Hardened Octal Transparent Latch, Three-State

Intersil 

HCS373MS

Three-State Low Timing Diagram

VIH

OE

VIL

VOZ

VOL

VS

INPUT

TPZL

VT

TPLZ

OUTPUT

VW

Three-State Load Circuit

VCC

DUT

CL = 50pF

RL = 500Ω

RL

TEST

POINT

CL

THREE-STATE LOW VOLTAGE LEVELS

PARAMETER

VCC

VIH

VS

VT

VW

GND

VIL

HCS

4.50

4.50

2.25

2.25

0.90

0

0

UNITS

V

V

V

V

V

V

V

Three-State High Timing Diagram

VIH

OE

VIL

VOH

VOZ

VS

INPUT

TPHZ

VW

TPZH

OUTPUT

VT

Three-State Load Circuit

DUT

CL

TEST

POINT

RL

CL = 50pF

RL = 500Ω

THREE-STATE HIGH VOLTAGE LEVELS

PARAMETER

VCC

VIH

VS

VT

VW

GND

VIL

HCS

4.50

4.50

2.25

2.25

3.60

0

0

UNITS

V

V

V

V

V

V

V

Spec Number 518845

354

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