HM62W8511CJP10 データシートの表示（PDF） - Renesas Electronics
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HM62W8511CJP10 Datasheet PDF : 16 Pages
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HM62W8511HC Series
Write Cycle
HM62W8511HC
-10
-12
Parameter
Symbol Min Max Min
Max Unit
Notes
Write cycle time
tWC
10
— 12
— ns
Address valid to end of write
tAW
7
—8
— ns
Chip select to end of write
tCW
7
—8
— ns
9
Write pulse width
tWP
7
—8
— ns
8
Address setup time
t
0
—0
— ns
6
AS
Write recovery time
t
0
—0
— ns
7
WR
Data to write time overlap
tDW
5
—6
— ns
Data hold from write time
tDH
0
—0
— ns
Write disable to output in low-Z
tOW
3
—3
— ns
1
Output disable to output in high-Z tOHZ
—
5
—
6
ns
1
Write enable to output in high-Z
t
—
5
—
6
ns
1
WHZ
Notes: 1. Transition is measured ±200 mV from steady voltage with output load (B). This parameter is
sampled and not 100% tested.
2. Address should be valid prior to or coincident with CS transition low.
3. WE and/or CS must be high during address transition time.
4. If CS and OE are low during this period, I/O pins are in the output state. Then, the data input
signals of opposite phase to the outputs must not be applied to them.
5. If the CS low transition occurs simultaneously with the WE low transition or after the WE transition,
output remains a high impedance state.
6. t is measured from the latest address transition to the later of CS or WE going low.
AS
7. tWR is measured from the earlier of CS or WE going high to the first address transition.
8. A write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition
among CS going low and WE going low. A write ends at the earliest transition among CS going
high and WE going high. tWP is measured from the beginning of write to the end of write.
9. t is measured from the later of CS going low to the end of write.
CW
Rev. 2, Nov. 2001, page 8 of 14
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