IS41C44052C データシートの表示（PDF） - Integrated Silicon Solution

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IS41C44052C

4Mx4 16Mb DRAM WITH FAST PAGE MODE

Integrated Silicon Solution 

IS41C44052C

IS41LV44052C

ELECTRICAL CHARACTERISTICS(1)

(Recommended Operating Conditions unless otherwise noted.)

Symbol Parameter

Test Condition

Vdd/Speed Min.

Idd1

Standby Current: TTL

RAS, CAS ≥ Vih Commercial

Industrial

5V

3.3V —

5V

—

3.3V —

Idd2

Standby Current: CMOS

RAS, CAS ≥ Vdd – 0.2V

5V

—

3.3V —

Idd3

Operating Current:

RAS, CAS,

-50

—

Random Read/Write(2,3)

Address Cycling, trc = trc (min.)

-60

—

Average Power Supply Current

Idd4

Operating Current:

Fast Page Mode(2,3,4)

Average Power Supply Current

RAS= Vil, CAS ≥ Vih

trc = trc (min.)

-50

—

-60

—

Idd5

Refresh Current:

RAS Cycling, CAS ≥ Vih

RAS-Only(2,3)

trc = trc (min.)

Average Power Supply Current

-50

—

-60

—

Idd6

Refresh Current:

RAS, CAS Cycling

CBR(2,3,5)

trc = trc (min.)

Average Power Supply Current

-50

­—

-60

­—

Max. Unit

2 mA

0.5

3

2

1 mA

0.5

120 mA

110

90 mA

80

120 mA

110

120 mA

110

Notes:

1. An initial pause of 200 µs is required after power-up followed by eight RAS refresh cycles (RAS-Only or CBR) before proper device

operation is assured. The eight RAS cycles wake-up should be repeated any time the tref refresh requirement is exceeded.

2. Dependent on cycle rates.

3. Specified values are obtained with minimum cycle time and the output open.

4. Column-address is changed once each Fast Page cycle.

5. Enables on-chip refresh and address counters.

Integrated Silicon Solution, Inc. — 1-800-379-4774

5

Rev.  00B

08/09/2010

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