LH5496HD-20 データシートの表示（PDF） - Sharp Electronics

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LH5496HD-20

CMOS 512 × 9 FIFO

Sharp Electronics 

LH5496/96H

CMOS 512 × 9 FIFO

OPERATIONAL DESCRIPTION

Reset

The device is reset whenever the Reset pin (RS) is

taken to a LOW state. The reset operation initializes both

the read and write address pointers to the first memory

location. The XI and FL pins are also sampled at this time

to determine whether the device is in Single mode or

Depth Expansion mode. A reset pulse is required when

the device is first powered up. The Read (R) and Write

(W) pins may be in any state when reset is initiated, but

must be brought to a HIGH state tRPW and tWPW before

the rising edge of RS. The reset operation forces the

Empty Flag EF to be asserted (EF = LOW), and the

Half-Full Flag HF and the Full FLag FF to be deasserted

(HF = FF = HIGH); the Data Out pins (D0 – D8) are forced

into a high-impedance state.

Write

A write cycle is initiated on the falling edge of the Write

(W) pin. Data setup and hold times must be observed on

the data in (D0 – D8) pins. Awrite operation is only possible

if the FIFO is not full, (i.e. the Full flag pin is HIGH). Writes

may occur independently of any ongoing read operta-

tions.

At the falling edge of the first write after the memory is

half filled, the Half-Full flag will be asserted (HF = LOW)

and will remain asserted until the difference between the

write pointer and read pointer indicates that the remaining

data in the device is less than or equal to one half the total

capacity of the FIFO. The Half-Full flag is deasserted

(HF = HIGH) by the appropriate rising edge of R.

The Full flag is asserted (FF = LOW) at the falling edge

of the write operation which fills the last available location

in the FIFO memory array. The Full flag will inhibit further

writes until cleared by a valid read. The Full flag is

deasserted (FF = HIGH) after the next rising edge of R

releases another memory location.

Read

A read cycle is initiated on the falling edge of the Read

(R) pin. Read data becomes valid on the data out (Q0–Q8)

pins after a time tA from the falling edge of R. After R goes

HIGH, the data out pins return to a high-impedance state.

Reads may occur independent of any ongoing write

operations. Aread is only possible if the FIFOis notempty

(EF = HIGH).

The internal read and write address pointers are main-

tained by the device such that consecutive read opera-

tions will access data in the same order as it was written.

The Empty flag is asserted (EF = LOW) after the falling

edge of R which accesses the last available data in the

FIFO memory. EF is deasserted (EF = HIGH) after the

next rising edge of W loads another word of valid data.

Data Flow-Through

Read flow-through mode occurs when the Read (R)

pin is brought LOW while the FIFO is empty, and held

LOW in anticipation of a write cycle. At the end of the next

write cycle, the Empty flag will be momentarily deas-

serted, and the data just written will become available on

the data out pins after a maximum time of tWEF + tA.

Additional writes may occur while the R pin remains LOW,

but only data from the first write flows through to the

outputs. Additional data, if any, can only be accessed by

toggling R.

Write flow-through mode occurs when the Write (W)

pin is brought LOW while the FIFO is full, and held LOW

in anticipation of a read cycle. At the end of the read cycle,

the Full flag will be momentarily deasserted, but then

immediately reasserted in response to W held LOW. Data

is written into the FIFO on the rising edge of W which may

occur tRFF + tWPW after the read.

Retransmit

The FIFO can be made to reread previously read data

through the retransmit function. Retransmit is initiated by

pulsing RT LOW. This resets the internal read address

pointer to the first physical location in the memory while

leaving the internal write address pointer unchanged.

Data between the read and write pointers may be reac-

cessed by subsequent reads. Both R and W must be

inactive (HIGH) during the retransmit pulse. Retransmit

is useful if no more than 512 writes are performed be-

tween resets. Retransmit may affect the status of EF, HF,

and FF flags, depending on the relocation of the read

pointer. This function is not available in depth expansion

mode.

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